A memory cell includes: a bit line and a plate line that are spaced apart from each other and vertically oriented in a first direction; a transistor including an active layer, the active layer being laterally oriented in a second direction, intersecting with the bit line; a capacitor laterally oriented in the second direction between the active layer and the plate line; and a word line laterally oriented in a third direction, intersecting with the bit line and the active layer, wherein the word line is embedded in the active layer.