Invention Grant
- Patent Title: Source-down transistor with vertical field plate
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Application No.: US16939198Application Date: 2020-07-27
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Publication No.: US11335803B2Publication Date: 2022-05-17
- Inventor: Chiao-Shun Chuang , Che-Yung Lin
- Applicant: Diodes Incorporated
- Applicant Address: US TX Plano
- Assignee: Diodes Incorporated
- Current Assignee: Diodes Incorporated
- Current Assignee Address: US TX Plano
- Agent Yingsheng Tung; Steven A. Shaw
- Main IPC: H01L29/78
- IPC: H01L29/78 ; H01L29/423 ; H01L29/40

Abstract:
The structure of a field-effect transistor with a source-down configuration and process of making the transistor are described in this paper. The transistor is built in a semiconductor chip with a trench extending from top chip surface towards the bottom surface. The trench contains a conductive gate material embedded in a dielectric material in the trench. A conductive field plate is also embedded in the trench and extends from the top surface of the chip towards the bottom surface of the chip and splits the conductive gate electrode into two halves. The conductive field plate penetrates the trench and makes electrical contact with the heavily doped substrate near the bottom surface of the chip.
Public/Granted literature
- US20210151596A1 Source-Down Transistor with Vertical Field Plate Public/Granted day:2021-05-20
Information query
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