Apparatus and method to facilitate increased input/output performance are disclosed herein. An apparatus may include one or more computing components; a first row of a plurality of pins and a second row of a plurality of pins located on a first side of the apparatus, wherein the first row is disposed on the first side between the one or more computing components and the second row; and a third row of a plurality of pins and a fourth row of a plurality of pins located on a second side of the apparatus, wherein the third row is disposed on the second side between the one or more computing components and the fourth row, and the second side to comprise a side opposite the first side, wherein the first, second, third, and fourth rows lack direct electrical coupling with each other and are electrically coupled to the one or more computing components.