Duty signal ratio and signal generation circuits with clock signal duty ratio stabilization under decreased power supply conditions are disclosed. In one example, a duty ratio correction circuit includes an inverting buffer, a capacitor, a low pass filter, an error amplifier, and an adjusting unit. The capacitor adjusts the rising and falling times of an inverted signal output from the inverting buffer. The low pass filter extracts a low frequency component of the inverted signal. The error amplifier adjusts a duty ratio of the inverted signal by controlling at least one of an output source current and an output sink current of the inverting buffer on the basis of a difference between the extracted low frequency component and a reference signal. The adjusting unit adjusts the control of the inverting buffer by the error amplifier.