- Patent Title: Packet handling based on multiprocessor architecture configuration
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Application No.: US16751193Application Date: 2020-01-23
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Publication No.: US11340932B2Publication Date: 2022-05-24
- Inventor: Yong Wang , Boon Seong Ang , Guolin Yang , Wenyi Jiang
- Applicant: VMware, Inc.
- Applicant Address: US CA Palo Alto
- Assignee: VMware, Inc.
- Current Assignee: VMware, Inc.
- Current Assignee Address: US CA Palo Alto
- Agency: Su IP Consulting
- Main IPC: G06F15/16
- IPC: G06F15/16 ; G06F9/455 ; G06F9/50 ; H04L43/0817 ; H04L43/16 ; H04L12/46 ; G06F9/54

Abstract:
Example methods and systems for packet handling based on a multiprocessor architecture configuration are provided. One example method may comprise: in response to receiving a first ingress packet that requires processing by a first virtual central processing unit (VCPU) running on the first node, steering the first ingress packet towards a first receive (RX) queue and performing local memory access on the first node to access the first ingress packet from the first RX queue. The method may also comprise: in response to receiving a second ingress packet that requires processing by a second VCPU running on the second node, steering the second ingress packet towards a second RX queue and performing local memory access on the second node to access the second ingress packet from the second RX queue.
Public/Granted literature
- US20210232417A1 PACKET HANDLING BASED ON MULTIPROCESSOR ARCHITECTURE CONFIGURATION Public/Granted day:2021-07-29
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