Invention Grant
- Patent Title: Dual-level pad card edge self-guide and alignment of connector
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Application No.: US16892426Application Date: 2020-06-04
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Publication No.: US11342697B2Publication Date: 2022-05-24
- Inventor: Paul W Coteus , Thomas Cipolla , Kyu-hyoun Kim , Edmund Blackshear
- Applicant: International Business Machines Corporation
- Applicant Address: US NY Armonk
- Assignee: International Business Machines Corporation
- Current Assignee: International Business Machines Corporation
- Current Assignee Address: US NY Armonk
- Agency: Lou Percello, Attorney, PLLC
- Agent Daniel P. Morris; Gail Zarick
- Main IPC: H01R12/72
- IPC: H01R12/72 ; H05K3/00 ; H05K1/18 ; H01R12/70

Abstract:
A card, e.g. a printed circuit board (PCB), has one or more conductive layers and one or more non-conductive layers disposed and alternating upon one another to form a stack. One or more of the conductive layers has one or more wiring elements within the conductive layer. The PCB/card has one or more card edges. The PCB also has a plurality of dual-level pad structures on each of one or more of the card edges. The dual-level pad structures each have an upper level, a lower level, and two or more walls. The lower level is a conductive pad with conductive surface. At least one of the conductive pads electrically connects to one or more of the wiring elements and/or one or more vias. In each of the dual-level pad structures, the walls and upper level may be made of an electrically non-conductive, insulating, or dielectric material or may be covered with a conductive material that electrically connects to conductive surface. There are different non-limiting embodiments of the structures and methods of making the structures.
Public/Granted literature
- US20210384661A1 Dual-Level Pad Card Edge Self-Guide and Alignment of Connector Public/Granted day:2021-12-09
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