A frequency locked loop circuit, including a frequency generation circuit, a first impedance circuit, a second impedance circuit and a switching circuit. The frequency generation circuit includes a positive terminal and a negative terminal. The frequency generation circuit outputs an output clock signal according to a voltage difference between the positive terminal and the negative terminal. The first impedance circuit and the second impedance circuit are electrically coupled to a first impedance node and a second impedance node, respectively. The second impedance circuit adjusts an impedance value of the second impedance circuit according to the output clock signal. The switching circuit is configured to periodically conduct the negative terminal to one of the first impedance node and the second impedance node, and periodically conduct the positive terminal to the other one of the first impedance node and the second impedance node.