Invention Grant
- Patent Title: Method of managing multi-tier memory displacement using software controlled thresholds
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Application No.: US16927352Application Date: 2020-07-13
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Publication No.: US11354127B2Publication Date: 2022-06-07
- Inventor: Harshad S. Sane , Anup Mohan , Kshitij A. Doshi , Mark A. Schmisseur
- Applicant: Intel Corporation
- Applicant Address: US CA Santa Clara
- Assignee: Intel Corporation
- Current Assignee: Intel Corporation
- Current Assignee Address: US CA Santa Clara
- Agency: Jaffery Watson Mendonsa & Hamilton LLP
- Main IPC: G06F9/30
- IPC: G06F9/30 ; G06F12/0808 ; G06F9/38 ; G06F12/126 ; G06F12/0888 ; G06F12/0862

Abstract:
A computing system includes a memory controller having a plurality of bypass parameters set by a software program, a thresholds matrix to store threshold values selectable by the plurality of bypass parameters, and a bypass function to determine whether a first cache line is to be displaced with a second cache line in a first memory or the first cache line remains in the first memory and the second cache line is to be accessed by at least one of a processor core and the cache from a second memory.
Public/Granted literature
- US20200348936A1 METHOD OF MANAGING MULTI-TIER MEMORY DISPLACEMENT USING SOFTWARE CONTROLLED THRESHOLDS Public/Granted day:2020-11-05
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