Invention Grant
- Patent Title: Machine learning network implemented by statically scheduled instructions, with MLA chip
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Application No.: US16841598Application Date: 2020-04-06
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Publication No.: US11354570B2Publication Date: 2022-06-07
- Inventor: Nishit Shah , Reed Kotler , Srivathsa Dhruvanarayan , Moenes Zaher Iskarous , Kavitha Prasad , Yogesh Laxmikant Chobe , Sedny S. J Attia , Spenser Don Gilliland
- Applicant: SiMa Technologies, Inc.
- Applicant Address: US CA San Jose
- Assignee: SiMa Technologies, Inc.
- Current Assignee: SiMa Technologies, Inc.
- Current Assignee Address: US CA San Jose
- Agency: Fenwick & West LLP
- Main IPC: G06N3/06
- IPC: G06N3/06 ; G06N3/063 ; G06F8/41 ; G06F9/30 ; G06N20/00

Abstract:
A compiler receives a description of a machine learning network and generates a computer program that implements the machine learning network. The computer program includes statically scheduled instructions that are executed by a mesh of processing elements (Tiles). The instructions executed by the Tiles are statically scheduled because the compiler can determine which instructions are executed by which Tiles at what times. For example, for the statically scheduled instructions, there are no conditions, branching or data dependencies that can be resolved only at run-time, and which would affect the timing and order of the execution of the instructions.
Public/Granted literature
- US20210312267A1 MACHINE LEARNING NETWORK IMPLEMENTED BY STATICALLY SCHEDULED INSTRUCTIONS, WITH MLA CHIP Public/Granted day:2021-10-07
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