Invention Grant
- Patent Title: Gap patterning for metal-to-source/drain plugs in a semiconductor device
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Application No.: US16878005Application Date: 2020-05-19
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Publication No.: US11355399B2Publication Date: 2022-06-07
- Inventor: Yu-Lien Huang , Ching-Feng Fu , Huan-Just Lin , Fu-Sheng Li , Tsai-Jung Ho , Bor Chiuan Hsieh , Guan-Xuan Chen , Guan-Ren Wang
- Applicant: Taiwan Semiconductor Manufacturing Company Limited
- Applicant Address: TW Hsinchu
- Assignee: Taiwan Semiconductor Manufacturing Company Limited
- Current Assignee: Taiwan Semiconductor Manufacturing Company Limited
- Current Assignee Address: TW Hsinchu
- Agency: Harrity & Harrity, LLP
- Main IPC: H01L21/8234
- IPC: H01L21/8234 ; H01L21/768 ; H01L23/535 ; H01L27/088 ; H01L29/08 ; H01L29/417 ; H01L29/66 ; H01L29/06 ; H01L29/78
Abstract:
A method may include forming a mask layer on top of a first dielectric layer formed on a first source/drain and a second source/drain, and creating an opening in the mask layer and the first dielectric layer that exposes portions of the first source/drain and the second source/drain. The method may include filling the opening with a metal layer that covers the exposed portions of the first source/drain and the second source/drain, and forming a gap in the metal layer to create a first metal contact and a second metal contact. The first metal contact may electrically couple to the first source/drain and the second metal contact may electrically couple to the second source/drain. The gap may separate the first metal contact from the second metal contact by less than nineteen nanometers.
Public/Granted literature
- US20210366780A1 GAP PATTERNING FOR METAL-TO-SOURCE/DRAIN PLUGS IN A SEMICONDUCTOR DEVICE Public/Granted day:2021-11-25
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