Invention Grant
- Patent Title: Semiconductor device including through-package debug features
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Application No.: US16021687Application Date: 2018-06-28
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Publication No.: US11355403B2Publication Date: 2022-06-07
- Inventor: Nir Amir , Avichay Hodes
- Applicant: Western Digital Technologies, Inc.
- Applicant Address: US CA San Jose
- Assignee: Western Digital Technologies, Inc.
- Current Assignee: Western Digital Technologies, Inc.
- Current Assignee Address: US CA San Jose
- Agency: Vierra Magen Marcus LLP
- Main IPC: H01L21/66
- IPC: H01L21/66 ; G01R31/28 ; H01L23/31 ; H01L23/48 ; H01L23/498 ; H01L25/065 ; G01R31/3185

Abstract:
A semiconductor device includes through-package debug features enabling debug of a BGA package while mounted to a printed circuit board or other host device. In one example, the through-package debug features are filled or plated vias extending from a surface of the semiconductor device, through a device housing, down to test pads on the substrate. In another example, the through-package debug features are open channels formed from a surface of the semiconductor device.
Public/Granted literature
- US20200006163A1 SEMICONDUCTOR DEVICE INCLUDING THROUGH-PACKAGE DEBUG FEATURES Public/Granted day:2020-01-02
Information query
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