Invention Grant
- Patent Title: Multi-die chip
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Application No.: US16873973Application Date: 2020-09-02
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Publication No.: US11355455B2Publication Date: 2022-06-07
- Inventor: Michael Gude
- Applicant: Michael Gude
- Applicant Address: DE Kerpen
- Assignee: Michael Gude
- Current Assignee: Michael Gude
- Current Assignee Address: DE Kerpen
- Priority: DE102019006294.9 20190905
- Main IPC: H01L23/00
- IPC: H01L23/00 ; H01L23/528

Abstract:
The task of the present invention is to realize chips of different sizes, in particular FPGAs, without the need for ever new production mask sets. In the conventional way, a single die can be used or almost any number of dies from one wafer.
According to the invention, only one lithography mask set is used for chip production and multi-die chips of different sizes with 1 . . . n single dies are separated from a wafer.
The single dies are connected by the scribeline between the dies. According to the patent claims, various precautions must be taken to ensure that the dies are reliably connected and that no problems occur when separating the multi-die chips.
According to the invention, only one lithography mask set is used for chip production and multi-die chips of different sizes with 1 . . . n single dies are separated from a wafer.
The single dies are connected by the scribeline between the dies. According to the patent claims, various precautions must be taken to ensure that the dies are reliably connected and that no problems occur when separating the multi-die chips.
Public/Granted literature
- US20210074651A1 Multi-die chip Public/Granted day:2021-03-11
Information query
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