Invention Grant
- Patent Title: Fully digital glitch detection mechanism with process and temperature compensation
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Application No.: US16445650Application Date: 2019-06-19
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Publication No.: US11355457B2Publication Date: 2022-06-07
- Inventor: Andreas Lentz , Stefan Heyse , Martin Heinrich Butkus , Oliver Alexander Schmidt
- Applicant: NXP B.V.
- Applicant Address: NL Eindhoven
- Assignee: NXP B.V.
- Current Assignee: NXP B.V.
- Current Assignee Address: NL Eindhoven
- Main IPC: H01L23/00
- IPC: H01L23/00 ; H03K19/20 ; H03K3/037 ; H03K5/00 ; G06F21/55 ; H03K3/011

Abstract:
A fully digital method and apparatus are provided for detecting glitches on a monitored line by providing a toggle signal to an initial delay circuit and a plurality of delay elements formed with standard logic cells so that logic values from the delay elements are captured in a corresponding plurality of clocked capture flops to provide a digitized representation of a delay value during a sampling period which is converted to a numerical measurement result which is evaluated against a reference value to generate an output error signal if a difference between the numerical measurement result and reference value exceeds a programmable margin, where the initial delay circuit is configured with a trim setting to impose an initial delay to compensate for process variations and where the reference value is adapted over a plurality of sampling periods to compensate for temperature effects on the numerical measurement result.
Information query
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