Invention Grant
- Patent Title: Source/drain EPI structure for device boost
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Application No.: US17106389Application Date: 2020-11-30
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Publication No.: US11355587B2Publication Date: 2022-06-07
- Inventor: Shahaji B. More
- Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
- Applicant Address: TW Hsinchu
- Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
- Current Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
- Current Assignee Address: TW Hsinchu
- Agency: Haynes and Boone, LLP
- Main IPC: H01L29/08
- IPC: H01L29/08 ; H01L29/78 ; H01L29/66 ; H01L29/165 ; H01L21/02 ; H01L29/167

Abstract:
A method includes providing a substrate, a semiconductor fin extending from the substrate, and a gate structure over the substrate and engaging the semiconductor fin; etching the semiconductor fin to form a source/drain trench; and epitaxially growing a source/drain feature in the source/drain trench, which includes epitaxially growing a first semiconductor layer having silicon germanium (SiGe); epitaxially growing a second semiconductor layer having SiGe above the first semiconductor layer; epitaxially growing a third semiconductor layer having SiGe over the second semiconductor layer; and epitaxially growing a fourth semiconductor layer having SiGe and disposed at a corner portion of the source/drain feature where the source/drain feature has a largest lateral dimension. Each of the first, second, third, and fourth semiconductor layers includes a p-type dopant, and the fourth semiconductor layer has a higher dopant concentration of the p-type dopant than each of the first, second, and third semiconductor layers.
Information query
IPC分类: