Invention Grant
- Patent Title: Devices with lower resistance and improved breakdown and method for producing the same
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Application No.: US16995397Application Date: 2020-08-17
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Publication No.: US11355599B2Publication Date: 2022-06-07
- Inventor: Eng Huat Toh , Shyue Seng Tan , Elgin Kiok Boone Quek
- Applicant: GLOBALFOUNDRIES Singapore Pte. Ltd.
- Applicant Address: SG Singapore
- Assignee: GLOBALFOUNDRIES Singapore Pte. Ltd.
- Current Assignee: GLOBALFOUNDRIES Singapore Pte. Ltd.
- Current Assignee Address: SG Singapore
- Agency: Ditthavong, Steiner & Mlotkowski
- Main IPC: H01L29/792
- IPC: H01L29/792 ; H01L29/40 ; H01L29/06 ; H01L29/10 ; H01L29/78 ; H01L29/66 ; H01L29/51 ; H01L21/28 ; H01L29/20

Abstract:
Methods of forming a ferroelectric material layer below a field plate for achieving increased Vbr with reduced Rdson and resulting devices are provided. Embodiments include forming a N-Drift in a portion of the Si layer formed in a portion of a p-sub; forming an oxide layer over portions of the Si layer and the N-Drift; forming a gate over a portion of the oxide layer; forming a S/D extension region in the Si layer; forming first and second spacers on opposite sides of the gate and the oxide layer; forming a S/D region in the Si layer adjacent to the S/D extension region and a S/D region in the N-Drift remote from the Si layer; forming a U-shaped ferroelectric material layer over the oxide layer and the N-Drift, proximate or adjacent to the gate; and filling the U-shaped ferroelectric material layer with a metal, a field gate formed.
Public/Granted literature
- US20200381521A1 DEVICES WITH LOWER RESISTANCE AND IMPROVED BREAKDOWN AND METHOD FOR PRODUCING THE SAME Public/Granted day:2020-12-03
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