Invention Grant
- Patent Title: Multi-gate device and method of fabrication thereof
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Application No.: US17073013Application Date: 2020-10-16
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Publication No.: US11355611B2Publication Date: 2022-06-07
- Inventor: Kuo-Cheng Ching , Ching-Fang Huang , Wen-Hsing Hsieh , Ying-Keung Leung , Chih-Hao Wang , Carlos H. Diaz
- Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.
- Applicant Address: TW Hsinchu
- Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
- Current Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
- Current Assignee Address: TW Hsinchu
- Agency: Haynes and Boone, LLP
- Main IPC: H01L21/3205
- IPC: H01L21/3205 ; H01L21/84 ; H01L29/66 ; H01L29/78 ; H01L29/786 ; H01L29/423 ; H01L29/06 ; H01L29/417
Abstract:
A semiconductor device includes a source/drain feature disposed over a substrate. The source/drain feature includes a first nanowire, a second nanowire disposed over the first nanowire, a cladding layer disposed over the first nanowire and the second nanowire and a spacer layer extending from the first nanowire to the second nanowire. The device also includes a conductive feature disposed directly on the source/drain feature such that the conductive feature physically contacts the cladding layer and the spacer layer.
Public/Granted literature
- US20210050427A1 Multi-Gate Device and Method of Fabrication Thereof Public/Granted day:2021-02-18
Information query
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