- Patent Title: Vertical field effect transistor with bottom source-drain region
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Application No.: US16733679Application Date: 2020-01-03
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Publication No.: US11355633B2Publication Date: 2022-06-07
- Inventor: Alexander Reznicek , Ruilong Xie , Chun-Chen Yeh , Balasubramanian S Pranatharthi Haran
- Applicant: International Business Machines Corporation
- Applicant Address: US NY Armonk
- Assignee: International Business Machines Corporation
- Current Assignee: International Business Machines Corporation
- Current Assignee Address: US NY Armonk
- Agent David K. Mattheis; Maeve M. Carpenter
- Main IPC: H01L29/78
- IPC: H01L29/78 ; H01L29/08 ; H01L29/10 ; H01L21/02 ; H01L29/66

Abstract:
A semiconductor device, and method of fabricating the device. The device including a plurality of vertical transistors, each vertical transistor having a raised semiconductor island having a first cross-sectional profile, a source-drain region disposed above the raised semiconductor island, the source-drain region having a second cross-sectional profile, and a semiconductor channel disposed above the source-drain region, the semiconductor channel having a third cross-sectional profile. The second cross-sectional profile is asymmetric.
Public/Granted literature
- US20210210632A1 VERTICAL FIELD EFFECT TRANSISTOR WITH BOTTOM SOURCE-DRAIN REGION Public/Granted day:2021-07-08
Information query
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