• Patent Title: Arrangement of switchboxes
  • Application No.: US16873976
    Application Date: 2020-09-02
  • Publication No.: US11356099B2
    Publication Date: 2022-06-07
  • Inventor: Michael Gude
  • Applicant: Michael Gude
  • Applicant Address: DE Kerpen
  • Assignee: Michael Gude
  • Current Assignee: Michael Gude
  • Current Assignee Address: DE Kerpen
  • Priority: DE102019006292.2 20190905
  • Main IPC: H03K19/17724
  • IPC: H03K19/17724
Arrangement of switchboxes
Abstract:
Switchboxes are especially used in integrated circuits with programmable logic (e.g. FPGAs). They are used to establish configurable signal paths between logic blocks. It is especially important to use an efficient structure, i.e. a structure whose chip area is as small as possible and which is able to realize short and fast signal paths. The task of the present invention is to significantly reduce the effort for the interconnection structures while still maintaining good routeability. This is achieved by the fact that there is no longer a switchbox (SB) on each coordinate position. It is particularly advantageous to arrange the SBs in a chessboard-like manner and also to use two SBs of different sizes which are arranged in a superordinate chessboard structure.
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