Invention Grant
- Patent Title: Disjoint array computer
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Application No.: US17324726Application Date: 2021-05-19
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Publication No.: US11360931B2Publication Date: 2022-06-14
- Inventor: Peter A. Schade
- Applicant: INTERNATIONAL MICROSYSTEMS, INC.
- Applicant Address: US CA Fremont
- Assignee: INTERNATIONAL MICROSYSTEMS, INC.
- Current Assignee: INTERNATIONAL MICROSYSTEMS, INC.
- Current Assignee Address: US CA Fremont
- Agency: Brundidge & Stanger, P.C.
- Main IPC: G06F15/173
- IPC: G06F15/173 ; G06F13/38 ; G06F13/42 ; G06F13/28 ; G06F15/16 ; G06F15/17

Abstract:
A hierarchical array computer architecture comprised of a master computer connected to a plurality of node computers wherein each node has a memory segment. A high speed connection scheme between the master computer and the nodes allows the master computer or individual nodes conditional access to the node memory segments. The resulting architecture creates an array computer with a large distributed memory in which each memory segment of the distributed memory has an associated computing element; the entire array being housed in a blade server type enclosure. The array computer created with this architecture provides a linear increase of processing speed corresponding to the number of nodes.
Public/Granted literature
- US20210271629A1 DISJOINT ARRAY COMPUTER Public/Granted day:2021-09-02
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