A display panel and a display device are provided. The display panel includes a pixel circuit including a driving module, a first reset module, a compensation module, a light-emitting control module and a light-emitting module. The first reset module includes a first dual-gate transistor, and the compensation module includes a second dual-gate transistor. A first intermediate node of the first dual-gate transistor and a second intermediate node of the second dual-gate transistor are electrically connected to a light-emitting control signal line through a first capacitor and a second capacitor, respectively. The first dual-gate transistor includes a first parasitic capacitor corresponding to the first capacitor, and the second dual-gate transistor includes a second parasitic capacitor corresponding to the second capacitor. A capacitance of at least one of the first capacitor and the second capacitor is greater than or equal to a capacitance of the corresponding parasitic capacitor.