Invention Grant
- Patent Title: Semiconductor structure and fabrication method
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Application No.: US16421756Application Date: 2019-05-24
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Publication No.: US11362005B2Publication Date: 2022-06-14
- Inventor: Zhen Yu Liu
- Applicant: Semiconductor Manufacturing International (Shanghai) Corporation , Semiconductor Manufacturing International (Beijing) Corporation
- Applicant Address: CN Shanghai; CN Beijing
- Assignee: Semiconductor Manufacturing International (Shanghai) Corporation,Semiconductor Manufacturing International (Beijing) Corporation
- Current Assignee: Semiconductor Manufacturing International (Shanghai) Corporation,Semiconductor Manufacturing International (Beijing) Corporation
- Current Assignee Address: CN Shanghai; CN Beijing
- Agency: Anova Law Group, PLLC
- Priority: CN201810663579.8 20180625
- Main IPC: H01L21/8238
- IPC: H01L21/8238 ; H01L29/417 ; H01L27/092

Abstract:
Semiconductor structures and fabrication methods are provided. An exemplary fabrication method includes providing a semiconductor substrate having a first region, a second region, a gate structure on the first region and a dummy gate structure on the second region, and an isolation structure in the semiconductor under the dummy gate structure. The method also includes forming source/drain openings in the semiconductor substrate at two sides of the gate structure. A sidewall surface of the source/drain opening contains an apex angle extending into the semiconductor substrate under the gate structure; and the source/drain opening exposes a sidewall surface of the isolation structure. Further; the method includes forming an initial bulk layer in the source/drain opening; performing a reshaping process to the initial bulk layer to form a bulk layer having an a substantially flat reshaped surface; and forming a protective layer on the bulk layer.
Public/Granted literature
- US20190393101A1 SEMICONDUCTOR STRUCTURE AND FABRICATION METHOD Public/Granted day:2019-12-26
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