Invention Grant
- Patent Title: Stacked self-aligned transistors with single workfunction metal
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Application No.: US16145123Application Date: 2018-09-27
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Publication No.: US11362189B2Publication Date: 2022-06-14
- Inventor: Aaron Lilak , Willy Rachmady , Rishabh Mehandru , Gilbert Dewey , Justin Weber
- Applicant: Intel Corporation
- Applicant Address: US CA Santa Clara
- Assignee: Intel Corporation
- Current Assignee: Intel Corporation
- Current Assignee Address: US CA Santa Clara
- Agency: Schwabe, Williamson & Wyatt P.C.
- Main IPC: H01L29/423
- IPC: H01L29/423 ; H01L29/49 ; H01L29/51 ; H01L29/66 ; H01L21/8238 ; H01L25/065 ; H01L23/522 ; H01L27/092 ; H01L23/00 ; H01L29/78 ; H01L27/105

Abstract:
Embodiments include transistor devices and a method of forming the transistor devices. A transistor device includes a first conductive layer over a substrate, a first transistor having first interconnects in the first conductive layer, and a second conductive layer on an insulating layer that is on the first conductive layer. The transistor device also includes a second transistor having second interconnects in the second conductive layer, and a gate electrode over the substrate, where the gate electrode has a workfunction metal that surrounds the first and second interconnects. The first and second conductive layers may include conductive materials such as an epitaxial (EPI) layer, a metal layer, or a doped-semiconductor layer. The transistor device may further include a dielectric surrounding the interconnects as the dielectric is surrounded with the workfunction metal, and a transition layer disposed between the dielectric and interconnects. The dielectric may include a high-k dielectric material.
Information query
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