Invention Grant
- Patent Title: Encoding and decoding with merge mode and block partition index
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Application No.: US17116137Application Date: 2020-12-09
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Publication No.: US11363299B2Publication Date: 2022-06-14
- Inventor: Jing Ya Li , Che Wei Kuo , Chong Soon Lim , Chu Tong Wang , Han Boon Teo , Hai Wei Sun , Kiyofumi Abe , Takahiro Nishi , Tadamasa Toma , Yusuke Kato
- Applicant: Panasonic Intellectual Property Corporation of America
- Applicant Address: US CA Torrance
- Assignee: Panasonic Intellectual Property Corporation of America
- Current Assignee: Panasonic Intellectual Property Corporation of America
- Current Assignee Address: US CA Torrance
- Agency: Seed IP Law Group LLP
- Main IPC: H04N19/66
- IPC: H04N19/66 ; H04N19/122 ; H04N19/176 ; H04N19/103 ; H04N19/96

Abstract:
An encoder includes circuitry and memory connected to the circuitry, and the circuitry, in operation: determines, based on a width and a height of a block, whether or not to disable a prediction mode in which the block is split along a partitioning line defined by a distance and an angle and then prediction is performed; and encodes the block with the prediction mode disabled or not disabled according to a result of the determination on whether or not to disable the prediction mode. Here, the distance is the shortest distance between the center of the block and the partitioning line, and the angle is an angle representing a direction from the center of the block toward the partitioning line in the shortest distance. The circuitry determines to disable the prediction mode when (i) a width-to-height ratio is at least 8 or (ii) a height-to-width ratio is at least 8.
Public/Granted literature
- US20210195245A1 ENCODER, DECODER, ENCODING METHOD, AND DECODING METHOD Public/Granted day:2021-06-24
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