- Patent Title: Structure and method to expose memory cells with different sizes
-
Application No.: US17070461Application Date: 2020-10-14
-
Publication No.: US11367623B2Publication Date: 2022-06-21
- Inventor: Sheng-Chau Chen , Cheng-Tai Hsiao , Cheng-Yuan Tsai , Hsun-Chung Kuang , Yao-Wen Chang
- Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
- Applicant Address: TW Hsin-Chu
- Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
- Current Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
- Current Assignee Address: TW Hsin-Chu
- Agency: Eschweiler & Potashnik, LLC
- Main IPC: H01L45/00
- IPC: H01L45/00 ; H01L21/311 ; H01L21/3105 ; H01L43/02 ; H01L23/528 ; H01L43/08 ; H01L43/12

Abstract:
A method of forming a memory device is provided. In some embodiments, a memory cell is formed over a substrate, and a sidewall spacer layer is formed along the memory cell. A lower etch stop layer is formed on the sidewall spacer layer, and an upper dielectric layer is formed on the lower etch stop layer. A first etching process is performed to etch back the upper dielectric layer using the lower etch stop layer as an etch endpoint.
Public/Granted literature
- US20210050220A1 STRUCTURE AND METHOD TO EXPOSE MEMORY CELLS WITH DIFFERENT SIZES Public/Granted day:2021-02-18
Information query
IPC分类: