Invention Grant
- Patent Title: Multi-chip package structure having dummy pad disposed between input/output units
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Application No.: US17034161Application Date: 2020-09-28
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Publication No.: US11367710B2Publication Date: 2022-06-21
- Inventor: Po-Chuan Lin
- Applicant: eGalax_eMPIA Technology Inc.
- Applicant Address: TW Taipei
- Assignee: eGalax_eMPIA Technology Inc.
- Current Assignee: eGalax_eMPIA Technology Inc.
- Current Assignee Address: TW Taipei
- Agency: Muncy, Geissler, Olds & Lowe, P.C.
- Priority: TW109125164 20200724
- Main IPC: H01L23/00
- IPC: H01L23/00 ; H01L25/065 ; H01L23/498

Abstract:
A multi-chip package structure includes outer leads, a first chip and a second chip. The outer leads are disposed on four sides of a chip bonding area of a package carrier thereof, respectively. The first chip is fixed on the chip bonding area and includes a core and a seal ring. Input/output units, and first bonding pads are disposed, in an outward order, on the sides of the core. Each first bonding pad is electrically connected to a corresponding outer lead through a first wire. Dummy pads are disposed between the input/output units and the at least one side of the core. The second chip is stacked on the core and includes second bonding pads connected to the corresponding outer leads through second wires and dummy pads, so as to prevent from short circuit caused by soldering overlap and contact between the wires.
Public/Granted literature
- US20220028831A1 MULTI-CHIP PACKAGE STRUCTURE Public/Granted day:2022-01-27
Information query
IPC分类: