A memory device is disclosed. The memory device includes: a first memory cell, including: a first transistor; a second transistor; and a first capacitor; a second memory cell, including: a third transistor; a fourth transistor; and a second capacitor; a third memory cell, including: a fifth transistor; a sixth transistor; and a third capacitor; and a fourth memory cell, including: a seventh transistor; an eighth transistor; and a fourth capacitor; wherein an electrode of the first capacitor, an electrode of the second capacitor, an electrode of the third capacitor, and an electrode of the fourth capacitor are electrically connected to a conductor. An associated manufacturing method is also disclosed.