- Patent Title: Methods of forming interconnect structures of semiconductor device
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Application No.: US16801166Application Date: 2020-02-26
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Publication No.: US11373947B2Publication Date: 2022-06-28
- Inventor: Chia-Cheng Chou , Chung-Chi Ko , Tze-Liang Lee
- Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
- Applicant Address: TW Hsinchu
- Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
- Current Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
- Current Assignee Address: TW Hsinchu
- Agency: JCIPRNET
- Main IPC: H01L23/522
- IPC: H01L23/522 ; H01L23/528 ; H01L21/768
Abstract:
An interconnect structure includes an interconnect structure includes an etching stop layer; a dielectric layer and an insert layer on the etching stop layer, and a conductive feature in the dielectric layer, the insert layer and the etching stop layer. A material of the insert layer is different from the dielectric layer and the etching stop layer.
Public/Granted literature
- US20210265264A1 METHODS OF FORMING INTERCONNECT STRUCTURES OF SEMICONDUCTOR DEVICE Public/Granted day:2021-08-26
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