Invention Grant
- Patent Title: Method and system for detecting abnormal die
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Application No.: US16944298Application Date: 2020-07-31
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Publication No.: US11378620B2Publication Date: 2022-07-05
- Inventor: Shou-Kang Fan , Lien-Sheng Yang
- Applicant: Integrated Silicon Solution Inc.
- Applicant Address: US CA Milpitas
- Assignee: Integrated Silicon Solution Inc.
- Current Assignee: Integrated Silicon Solution Inc.
- Current Assignee Address: US CA Milpitas
- Agency: McClure, Qualey & Rodack, LLP
- Priority: TW109115248 20200507
- Main IPC: G01R31/28
- IPC: G01R31/28

Abstract:
A method for detecting an abnormal die includes providing a wafer, determining the surrounding dies in accordance with a position of a target die on the wafer, calculating a difference between a value of an electrical characteristic of each of the surrounding dies and a value of an electrical characteristic of the target die to obtain the electrical characteristic deviations, ranking the absolute values of the electrical characteristic deviations to generate a ranking result, and determining the characteristic-related dies from the surrounding dies in accordance with the ranking result, determining a target-related area in accordance with the position of the target die, determining the target-related die from the characteristic-related dies in accordance with the target-related area and determining whether the target die is qualified in accordance with the target-related die.
Public/Granted literature
- US20210349147A1 METHOD AND SYSTEM FOR DETECTING ABNORMAL DIE Public/Granted day:2021-11-11
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