Invention Grant
- Patent Title: Route demultiplexed signal pairs
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Application No.: US17043793Application Date: 2018-06-05
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Publication No.: US11379399B2Publication Date: 2022-07-05
- Inventor: Mengistu Taye , Evan Lu
- Applicant: Hewlett-Packard Development Company, L.P.
- Applicant Address: US TX Spring
- Assignee: Hewlett-Packard Development Company, L.P.
- Current Assignee: Hewlett-Packard Development Company, L.P.
- Current Assignee Address: US TX Spring
- Agency: Brooks Cameron & Huebsch PLLC
- International Application: PCT/US2018/035965 WO 20180605
- International Announcement: WO2019/236057 WO 20191212
- Main IPC: G06F13/40
- IPC: G06F13/40 ; G06F13/38 ; G06F13/42

Abstract:
Example implementations relate to route demultiplexed signal pairs. In some examples, a motherboard of a computing device can include a chipset, a first Peripheral Component Interconnect Express (PCIe) bus, a second PCIe bus, a riser slot, and a demultiplexer connected to the chipset to selectively route particular signal pairs from the chipset to at least one of the first PCIe bus, the second PCIe bus, and the riser slot based on whether a riser card is connected to the riser slot.
Public/Granted literature
- US20210149832A1 ROUTE DEMULTIPLEXED SIGNAL PAIRS Public/Granted day:2021-05-20
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