Invention Grant
- Patent Title: Architecture for 3-D NAND memory
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Application No.: US17067577Application Date: 2020-10-09
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Publication No.: US11380397B2Publication Date: 2022-07-05
- Inventor: Midori Morooka , Tomoharu Tanaka
- Applicant: Micron Technology, Inc.
- Applicant Address: US ID Boise
- Assignee: Micron Technology, Inc.
- Current Assignee: Micron Technology, Inc.
- Current Assignee Address: US ID Boise
- Agency: Schwegman Lundberg & Woessner, P.A.
- Main IPC: G11C5/02
- IPC: G11C5/02 ; G11C16/04 ; G11C16/34 ; G11C16/06
Abstract:
Apparatuses are described that include stacked arrays of memory cell strings and their methods of operation. Apparatuses include architectures that reduce the use of several common components, allowing greater device density and smaller device size for a given semiconductor area.
Public/Granted literature
- US20210098065A1 ARCHITECTURE FOR 3-D NAND MEMORY Public/Granted day:2021-04-01
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