Provided is a multi-layer chip ceramic dielectric capacitor, relating to the field of capacitor technologies. For the multi-layer chip ceramic dielectric capacitor provided in the present disclosure, first to fifth internal electrodes are reasonably arranged, and a first capacitance component, a second capacitance component, a third capacitance component and a fourth capacitance component are connected in series to form the capacitor, with the same capacitance, then according to the voltage division principle of capacitor, when each of the small capacitors connected in series bears a voltage of U0, the whole capacitor can withstand a voltage of 4U0. Therefore, the multi-layer chip ceramic dielectric capacitor, in a series structure, provided in the present disclosure can withstand higher direct current and radio-frequency voltages.