Invention Grant
- Patent Title: Die stacks and methods forming same
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Application No.: US17080130Application Date: 2020-10-26
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Publication No.: US11380655B2Publication Date: 2022-07-05
- Inventor: Chen-Hua Yu , Chung-Hao Tsai , Chuei-Tang Wang
- Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
- Applicant Address: TW Hsinchu
- Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
- Current Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
- Current Assignee Address: TW Hsinchu
- Agency: Slater Matsil, LLP
- Main IPC: H01L23/522
- IPC: H01L23/522 ; H01L25/065 ; H01L23/528 ; H01L23/00 ; H01L23/31 ; H01L21/56 ; H01L21/768 ; H01L23/48

Abstract:
A method includes thinning a semiconductor substrate of a device die to reveal through-substrate vias that extend into the semiconductor substrate, and forming a first redistribution structure, which includes forming a first plurality of dielectric layers over the semiconductor substrate, and forming a first plurality of redistribution lines in the first plurality of dielectric layers. The first plurality of redistribution lines are electrically connected to the through-substrate vias. The method further includes placing a first memory die over the first redistribution structure, and forming a first plurality of metal posts over the first redistribution structure. The first plurality of metal posts are electrically connected to the first plurality of redistribution lines. The first memory die is encapsulated in a first encapsulant. A second plurality of redistribution lines are formed over, and electrically connected to, the first plurality of metal posts and the first memory die.
Public/Granted literature
- US20210043608A1 Die Stacks and Methods Forming Same Public/Granted day:2021-02-11
Information query
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