A SiO2 layer 5 is formed in the bottom portion of a Si pillar 3 and on an i-layer substrate 2. Subsequently, a gate HfO2 layer 11b is formed so as to surround the side surface of the Si pillar 3, and a gate TiN layer 12b is formed so as to surround the HfO2 layer 11b. Subsequently, P+ layers 18 and 32 containing an acceptor impurity at a high concentration and serving as a source and a drain are simultaneously or separately formed by a selective epitaxial crystal growth method on the exposed side surface of the bottom portion of and on the top portion of the Si pillar 3. Thus, an SGT is formed on the i-layer substrate 2.