Invention Grant
- Patent Title: Flicker noise elimination in a double balanced mixer DC bias circuit
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Application No.: US17085372Application Date: 2020-10-30
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Publication No.: US11381203B2Publication Date: 2022-07-05
- Inventor: Aritra Dey , Tolga Pamir , Mostafa Haroun
- Applicant: Analog Devices International Unlimited Company
- Applicant Address: IE County Limerick
- Assignee: Analog Devices International Unlimited Company
- Current Assignee: Analog Devices International Unlimited Company
- Current Assignee Address: IE County Limerick
- Agency: Knobbe, Martens, Olson & Bear, LLP
- Main IPC: H03D7/16
- IPC: H03D7/16 ; H03D7/14 ; H03H11/04 ; H03F3/45 ; H04B1/04 ; G05F3/26

Abstract:
A transmitter that reduces 3rd order harmonic (HD3) and inter modulation distortion (IMD3) for a gm stage of a mixer while reducing flicker noise is disclosed. The transmitter may include a balanced mixer, a transconductance stage connected to the mixer, and a bias circuit. The bias circuit may include a programmable current source configured to provide a reference current. Further, the bias circuit may include a replica circuit configured to replicate a DC signal of the transconductance stage. The bias circuit may also include a bias transistor configured to level shift a bias signal obtained from a signal source based on the reference current and the DC signal of the transconductance stage as determined from the replica circuit.
Information query
IPC分类: