Invention Grant
- Patent Title: Delay monitoring scheme for critical path timing margin
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Application No.: US16723273Application Date: 2019-12-20
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Publication No.: US11409323B2Publication Date: 2022-08-09
- Inventor: Rainer Herberholz , Peter Andrew Rees Williams
- Applicant: Arm Limited
- Applicant Address: GB Cambridge
- Assignee: Arm Limited
- Current Assignee: Arm Limited
- Current Assignee Address: GB Cambridge
- Agency: Talem IP Law, LLP
- Main IPC: G06F1/10
- IPC: G06F1/10 ; H03K19/21 ; G06F21/71 ; H03K5/00

Abstract:
A monitoring system for monitoring delay of critical path timing margins can include a plurality of adaptive monitoring circuits, where each adaptive monitoring circuit is coupled to a corresponding one of a plurality of paths in a circuit. Each adaptive monitoring circuit can include a first delay element designed to cause a mean timing margin of the plurality of N paths in the circuit to be within one minimum mean unit delay; a second delay element coupled to the first delay element and designed to add a mean delay of k*σmax; a set-up capture element capturing an output of the second delay element; and a set-up warning comparison element that outputs a set-up warning signal when the output of the set-up capture element and a shadow capture element or a capture element of the corresponding one of the plurality of paths do not satisfy an expected condition.
Public/Granted literature
- US20210191452A1 DELAY MONITORING SCHEME FOR CRITICAL PATH TIMING MARGIN Public/Granted day:2021-06-24
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