Invention Grant
- Patent Title: Intelligent memory wear leveling
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Application No.: US17177629Application Date: 2021-02-17
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Publication No.: US11409443B2Publication Date: 2022-08-09
- Inventor: Ravi Kumar , Deepanshu Dutta , Niles Yang , Mark Shlick
- Applicant: Western Digital Technologies, Inc.
- Applicant Address: US CA San Jose
- Assignee: Western Digital Technologies, Inc.
- Current Assignee: Western Digital Technologies, Inc.
- Current Assignee Address: US CA San Jose
- Agency: Michael Best & Friedrich LLP
- Main IPC: G06F3/06
- IPC: G06F3/06

Abstract:
A data storage device including, in one implementation, a non-volatile memory device and a controller coupled to the non-volatile memory device. The non-volatile memory device includes a memory block. The controller is configured to receive a cycle operation request and perform a wear-level mitigation operation in response to receiving the cycle operation request. To perform the wear-level mitigation operation, the controller is configured to determine a read state condition of the memory block, perform the requested cycle operation, and increment a cycle count of the memory block by a value based on the determined read state condition of the memory block. The first read state of the memory block and the second read state of the memory block are based on a wordline voltage that is associated with the memory block.
Public/Granted literature
- US20220171541A1 INTELLIGENT MEMORY WEAR LEVELING Public/Granted day:2022-06-02
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