Embodiments of the present disclosure relate to a memory system, a memory controller, and a method of operating the memory system. According to the embodiments of the present disclosure, the memory system may search for a target command, to be processed before entering a power-off state, in a plurality of command queues that queue commands to be inputted to the memory device when a sudden power off (SPO) signal is transmitted from a power management core to a flash interface layer core, may enqueue the target command into a top priority command queue having the highest priority among the plurality of command queues, and may input the target command enqueued into the top priority command queue to the memory device before entering the power-off state.