Invention Grant
- Patent Title: Generation of hardware design using a constraint solver module for topology synthesis
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Application No.: US17134384Application Date: 2020-12-26
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Publication No.: US11409934B2Publication Date: 2022-08-09
- Inventor: Federico Angiolini , Khaled Labib
- Applicant: ARTERIS, INC.
- Applicant Address: US CA Campbell
- Assignee: ARTERIS, INC.
- Current Assignee: ARTERIS, INC.
- Current Assignee Address: US CA Campbell
- Agency: Dana Legal Services
- Agent Jubin Dana
- Main IPC: G06F30/33
- IPC: G06F30/33 ; G06F30/367 ; G06F30/398 ; G06F30/327

Abstract:
In accordance with various embodiments and aspects of the invention, systems and methods are disclosed that can automatically find the best legal configuration that will be optimal with respect to a given set of requirements or metrics, such as: area, timing, and power. A designer defines the metrics or requirements, which represent the functional needs. A designer typically selects a set of parameters from a group of parameters available to user, which are user selectable parameters. The best parameters, from which the user can select parameters, are identified, and provided to the user. A constraint solver module ensures all rules are enforced and finds all legal parameters that fulfil the user intent. The constraint solver module generates configurations that meet the requirements and are legal configurations.
Public/Granted literature
- US20220207226A1 GENERATION OF HARDWARE DESIGN USING A CONSTRAINT SOLVER MODULE FOR TOPOLOGY SYNTHESIS Public/Granted day:2022-06-30
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