Invention Grant
- Patent Title: Microdisplay with reduced pixel size and method of forming same
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Application No.: US17177007Application Date: 2021-02-16
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Publication No.: US11410606B2Publication Date: 2022-08-09
- Inventor: Ihor Wacyk
- Applicant: eMagin Corporation
- Applicant Address: US NY Hopewell Junction
- Assignee: eMagin Corporation
- Current Assignee: eMagin Corporation
- Current Assignee Address: US NY Hopewell Junction
- Agency: Kaplan Breyer Schwarz, LLP
- Main IPC: G09G3/3258
- IPC: G09G3/3258 ; H01L27/32 ; H01L27/088 ; G09G3/3208 ; H01L27/06 ; H01L21/822

Abstract:
A vertically stacked pixel circuit is provided that includes a high voltage device for driving a pixel on an upper silicon layer, and low voltage circuitry (such as matrix addressing circuitry, data storage circuitry and uniformity compensation circuitry) on a lower silicon layer. The circuitry on the upper and lower silicon layers are electrically connected via a through-silicon via. This unique arrangement allows the high voltage device for driving a pixel to be physically located on top of the larger number of low voltage devices in the lower silicon layer in order to achieve a substantial reduction in overall pixel emission area. The vertically stacked pixel circuit is particularly suited for organic light-emitting diode microdisplays.
Public/Granted literature
- US20210183314A1 MICRODISPLAY WITH REDUCED PIXEL SIZE AND METHOD OF FORMING SAME Public/Granted day:2021-06-17
Information query
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