Invention Grant
- Patent Title: Semiconductor device assemblies including multiple stacks of different semiconductor dies
-
Application No.: US17011093Application Date: 2020-09-03
-
Publication No.: US11410969B2Publication Date: 2022-08-09
- Inventor: Blaine J. Thurgood
- Applicant: Micron Technology, Inc.
- Applicant Address: US ID Boise
- Assignee: Micron Technology, Inc.
- Current Assignee: Micron Technology, Inc.
- Current Assignee Address: US ID Boise
- Agency: Perkins Coie LLP
- Main IPC: H01L25/065
- IPC: H01L25/065 ; H01L25/18 ; H01L25/00 ; H01L23/00 ; G11C5/04

Abstract:
A semiconductor device assembly is provided. The assembly comprises a package substrate, a first stack of semiconductor dies having a first set of planform dimensions disposed over a first location on the substrate, a second stack of semiconductor dies having a second set of planform dimensions different from the first set disposed over a second location on the substrate, and an encapsulant at least partially encapsulating the substrate, the first stack and the second stack. The first stack of semiconductor dies has a first planform area, the second stack of semiconductor dies has a second planform area, and a sum of the first and second planform areas can be at least 50%, 67%, 75%, or even more of an area of the package substrate.
Information query
IPC分类: