Invention Grant
- Patent Title: 3D semiconductor apparatus manufactured with a cantilever structure and method of manufacture thereof
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Application No.: US17124053Application Date: 2020-12-16
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Publication No.: US11410992B2Publication Date: 2022-08-09
- Inventor: H. Jim Fulford , Mark I. Gardner
- Applicant: TOKYO ELECTRON LIMITED
- Applicant Address: JP Tokyo
- Assignee: TOKYO ELECTRON LIMITED
- Current Assignee: TOKYO ELECTRON LIMITED
- Current Assignee Address: JP Tokyo
- Agency: Oblon, McClelland, Maier & Neustadt, L.L.P.
- Main IPC: H01L27/06
- IPC: H01L27/06 ; H01L27/092 ; H01L21/8238

Abstract:
Aspects of the disclosure provide a method of forming a semiconductor apparatus. A stack of dielectric layers is formed over a semiconductor layer on a substrate of the semiconductor apparatus. Multiple openings are formed in the stack of dielectric layers. Multiple pillars including first sub-pillars and second sub-pillars are formed in the multiple openings. A cantilever structure that includes a first cantilever beam and a second cantilever beam is formed. A cantilever supporting structure that includes a portion of a first subset of the multiple pillars is formed. The first cantilever beam connects the second cantilever beam and the cantilever supporting structure. One of the stack of dielectric layers is removed to expose first portions of the first sub-pillars and second portions of the second sub-pillars. Isolation structures are formed between the first sub-pillars and the respective second sub-pillars.
Public/Granted literature
- US20220005805A1 3D SEMICONDUCTOR APPARATUS MANUFACTURED WITH A CANTILEVER STRUCTURE AND METHOD OF MANUFACTURE THEREOF Public/Granted day:2022-01-06
Information query
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