An equalizer has a first tapped delay line in which N taps (N is a positive integer) are connected in cascade, a second tapped delay line having one tap and connected in parallel with the first tapped delay line, a first multiplier configured to multiply signals extracted from the N taps by corresponding coefficients, a second multiplier configured to multiply a signal output from the second tapped delay line by a second coefficient, and an adder configured to add products of the first multiplier and a product of the second multiplier. The first tapped delay line has a fixed delay, and the second tapped delay line has a variable delay changeable at a 1/M resolution of the fixed delay, where M is a number greater than 1.