A semiconductor device includes a first semiconductor chip and a second semiconductor chip stacked on the first semiconductor chip and electrically connected to the first semiconductor chip by a first through electrode and a second through electrode. The first semiconductor chip may electrically connect the first through electrode to a third test resistor during a second test operation. The first semiconductor chip may detect a voltage level of the first internal node, which is determined by resistance values of the third test resistor and the first and second through electrodes, to test a short failure between the first and second through electrodes during the second test operation.