Invention Grant
- Patent Title: Methods and systems for generation of balanced secondary clocks from root clock
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Application No.: US17488559Application Date: 2021-09-29
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Publication No.: US11422586B1Publication Date: 2022-08-23
- Inventor: Aswath Vs , Sundarrajan Rangachari , Sarma Sundareswara Gunturi , Sanjay Pennam
- Applicant: Texas Instruments Incorporated
- Applicant Address: US TX Dallas
- Assignee: Texas Instruments Incorporated
- Current Assignee: Texas Instruments Incorporated
- Current Assignee Address: US TX Dallas
- Agent John R. Pessetto; Charles A. Brill; Frank D. Cimino
- Priority: IN202141007690 20210224
- Main IPC: G06F1/08
- IPC: G06F1/08 ; G06F1/10

Abstract:
A system for generating secondary clock signals from a primary clock signal includes a dithered clock divider which has a first input adapted to receive the primary clock signal and a second input adapted to receive a random division ratio. The dithered clock divider provides a dithered clock signal. The system includes a multi-phase clock generator which has a first input adapted to receive the primary clock signal, a second input adapted to receive the dithered clock signal, and a third input adapted to receive a pseudo-random pattern. The multi-phase clock generator provides the secondary clock signals from multiple phases of the dithered clock signal. The system includes a pseudo-random pattern generator which provides the pseudo-random pattern.
Public/Granted literature
- US20220271762A1 Methods and Systems for Generation of Balanced Secondary Clocks from Root Clock Public/Granted day:2022-08-25
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