Invention Grant
- Patent Title: Wafer level package structure with internal conductive layer
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Application No.: US16871325Application Date: 2020-05-11
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Publication No.: US11424209B2Publication Date: 2022-08-23
- Inventor: Sven Albers , Klaus Reingruber , Georg Seidemann , Christian Geissler , Richard Patten
- Applicant: Intel Corporation
- Applicant Address: US CA Santa Clara
- Assignee: Intel Corporation
- Current Assignee: Intel Corporation
- Current Assignee Address: US CA Santa Clara
- Agency: Schwabe, Williamson & Wyatt P.C.
- Main IPC: H01L23/552
- IPC: H01L23/552 ; H01L23/00 ; H01L23/433 ; H01L21/56 ; H01L21/48 ; H01L23/31 ; H01L23/36 ; H01L23/498
Abstract:
An apparatus is described that includes a redistribution layer and a semiconductor die on the redistribution layer. An electrically conductive layer resides over the semiconductor die. A compound mold resides over the electrically conductive layer.
Public/Granted literature
- US20200273832A1 WAFER LEVEL PACKAGE STRUCTURE WITH INTERNAL CONDUCTIVE LAYER Public/Granted day:2020-08-27
Information query
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