Invention Grant
- Patent Title: Prober
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Application No.: US17044242Application Date: 2019-03-25
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Publication No.: US11428727B2Publication Date: 2022-08-30
- Inventor: Katsuo Yasuta , Mamoru Aruga
- Applicant: KABUSHIKI KAISHA NIHON MICRONICS
- Applicant Address: JP Tokyo
- Assignee: KABUSHIKI KAISHA NIHON MICRONICS
- Current Assignee: KABUSHIKI KAISHA NIHON MICRONICS
- Current Assignee Address: JP Tokyo
- Agency: Browdy and Neimark, P.L.L.C.
- Priority: JPJP2018-069082 20180330
- International Application: PCT/JP2019/012536 WO 20190325
- International Announcement: WO2019/188999 WO 20191003
- Main IPC: G01R31/26
- IPC: G01R31/26 ; G01R1/073

Abstract:
An object of the present invention is to provide a prober that is able to carry out accurate inspection of semiconductor device in wafer state by reducing the effect of the external noises and the leakage of current and further by eliminating the stray capacitance of the chuck stage against the prober housing. The present invention attains this object by providing a prober comprising a chuck cover conductor that comprises a bottom conductor and a side conductor and an open top, wherein a chuck stage can be contained within a space surrounded by the bottom conductor and the side conductor; an upper cover conductor which has opening through which the conducting support members of the probe for front-side electrodes and the probe for back-side electrodes can be passed, and which is large enough to cover, in a plane view, at least the open top of the chuck cover conductor when the contact member of the probe for front-side electrodes moves relatively within a wafer under inspection; and, a conducting means that brings the chuck cover conductor and the upper cover conductor into contact and makes them electrically continuous.
Public/Granted literature
- US20210156901A1 PROBER Public/Granted day:2021-05-27
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