Invention Grant
- Patent Title: Logic circuitry package accessible for a time period duration while disregarding inter-integrated circuitry traffic
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Application No.: US16954388Application Date: 2018-12-03
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Publication No.: US11429554B2Publication Date: 2022-08-30
- Inventor: Stephen D. Panshin , Jefferson P. Ward , Scott A. Linn , James Michael Gardner
- Applicant: Hewlett-Packard Development Company, L.P.
- Applicant Address: US TX Spring
- Assignee: Hewlett-Packard Development Company, L.P.
- Current Assignee: Hewlett-Packard Development Company, L.P.
- Current Assignee Address: US TX Spring
- Agency: Hanley Flight & Zimmerman LLC
- International Application: PCT/US2018/063624 WO 20181203
- International Announcement: WO2020/117193 WO 20200611
- Main IPC: G06F13/42
- IPC: G06F13/42 ; B41J2/175 ; G06F9/30 ; G06F21/44 ; G06F21/62 ; G06F21/74 ; G06F21/85 ; H04L9/08 ; H04L9/32

Abstract:
In an example, a logic circuitry package has a first address and comprises a first logic circuit. In some examples, the first address is an I2C address for the first logic circuit, and the package is configured such that, in response to a first command indicative of a task and a first time period sent to the first address, the first logic circuit is to, for a duration of the time period, perform a task, and disregard I2C traffic sent to the first address.
Public/Granted literature
- US20210081350A1 LOGIC CIRCUITRY Public/Granted day:2021-03-18
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