Invention Grant
- Patent Title: Method of testing wafer
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Application No.: US17078523Application Date: 2020-10-23
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Publication No.: US11430733B2Publication Date: 2022-08-30
- Inventor: Yen-Hsung Ho , Chia-Yi Tseng , Chih-Hsun Lin , Kun-Tsang Chuang , Yung-Lung Hsu
- Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
- Applicant Address: TW Hsinchu
- Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
- Current Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
- Current Assignee Address: TW Hsinchu
- Agency: Birch, Stewart, Kolasch & Birch, LLP
- Main IPC: H01L21/66
- IPC: H01L21/66 ; H01L23/528 ; H01L23/544 ; H01L29/40 ; H01L23/522

Abstract:
A method includes capturing an image of a wafer, the wafer comprising a first conductive contact over an active region of the wafer and a second conductive contact over a shallow trench isolation (STI) region abutting the active region; identifying a brightness of a first contact region in the captured image at which the first conductive contact is rendered; identifying a brightness of a second contact region in the captured image at which the second conductive contact is rendered; and in response to the identified brightness of the first contact region in the captured image being substantially the same as the identified brightness of the second contact region in the captured image, determining that the second conductive contact is shorted to the first conductive contact.
Public/Granted literature
- US20210043566A1 METHOD OF TESTING WAFER Public/Granted day:2021-02-11
Information query
IPC分类: