Invention Grant
- Patent Title: Metallization structures for stacked device connectivity and their methods of fabrication
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Application No.: US16957047Application Date: 2018-03-05
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Publication No.: US11430814B2Publication Date: 2022-08-30
- Inventor: Aaron D. Lilak , Anh Phan , Patrick Morrow , Willy Rachmady , Gilbert Dewey , Jessica M. Torres , Kimin Jun , Tristan A. Tronic , Christopher J. Jezewski , Hui Jae Yoo , Robert S. Chau , Chi-Hwa Tsang
- Applicant: Intel Corporation
- Applicant Address: US CA Santa Clara
- Assignee: Intel Corporation
- Current Assignee: Intel Corporation
- Current Assignee Address: US CA Santa Clara
- Agency: Essential Patents Group, LLP
- International Application: PCT/US2018/020945 WO 20180305
- International Announcement: WO2019/172879 WO 20190912
- Main IPC: H01L27/12
- IPC: H01L27/12 ; H01L21/02 ; H01L21/285 ; H01L21/84 ; H01L27/22 ; H01L27/24 ; H01L29/08 ; H01L29/16 ; H01L29/417 ; H01L29/45 ; H01L29/66 ; H01L29/78

Abstract:
A stacked device structure includes a first device structure including a first body that includes a semiconductor material, and a plurality of terminals coupled with the first body. The stacked device structure further includes an insulator between the first device structure and a second device structure. The second device structure includes a second body such as a fin structure directly above the insulator. The second device structure further includes a gate coupled to the fin structure, a spacer including a dielectric material adjacent to the gate, and an epitaxial structure adjacent to a sidewall of the fin structure and between the spacer and the insulator. A metallization structure is coupled to a sidewall surface of the epitaxial structure, and further coupled with one of the terminals of the first device.
Information query
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