Invention Grant
- Patent Title: MTJ device performance by adding stress modulation layer to MTJ device structure
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Application No.: US16679498Application Date: 2019-11-11
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Publication No.: US11430945B2Publication Date: 2022-08-30
- Inventor: Jesmin Haq , Tom Zhong , Vinh Lam , Vignesh Sundar , Zhongjian Teng
- Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.
- Applicant Address: TW Hsinchu
- Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
- Current Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
- Current Assignee Address: TW Hsinchu
- Agency: Haynes and Boone, LLP
- Main IPC: G11B5/39
- IPC: G11B5/39 ; H01L43/02 ; H01L43/12 ; G11B19/20 ; G11B5/60 ; G11B5/48

Abstract:
A method for fabricating an improved magnetic tunneling junction (MTJ) structure is described. A bottom electrode is provided on a substrate. A MTJ stack is deposited on the bottom electrode. A top electrode is deposited on the MTJ stack. A first stress modulating layer is deposited between the bottom electrode and the MTJ stack, or a second stress modulating layer is deposited between the MTJ stack and the top electrode, or both a first stress modulating layer is deposited between the bottom electrode and the MTJ stack and a second stress modulating layer is deposited between the MTJ stack and the top electrode. The top electrode and MTJ stack are patterned and etched to form a MTJ device. The stress modulating layers reduce crystal growth defects and interfacial defects during annealing and improve the interface lattice epitaxy. This will improve device performance.
Public/Granted literature
- US20200075844A1 MTJ Device Performance by Adding Stress Modulation Layer to MTJ Device Structure Public/Granted day:2020-03-05
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